Freescale Semiconductor /MKW21Z4 /XCVR_TSM_REGS /TIMING21

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TIMING21

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SY_LO_DIVN_EN_TX_HI 0SY_LO_DIVN_EN_TX_LO 0SY_LO_DIVN_EN_RX_HI 0SY_LO_DIVN_EN_RX_LO

Description

TSM_TIMING21

Fields

SY_LO_DIVN_EN_TX_HI

Assertion time setting for SY_LO_DIVN_EN (TX)

SY_LO_DIVN_EN_TX_LO

De-assertion time setting for SY_LO_DIVN_EN (TX)

SY_LO_DIVN_EN_RX_HI

Assertion time setting for SY_LO_DIVN_EN (RX)

SY_LO_DIVN_EN_RX_LO

De-assertion time setting for SY_LO_DIVN_EN (RX)

Links

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